1. Field of the Invention
The present invention relates to a power regulator and a power supply system thereof, and more particularly to a pulse width modulation (PWM) power regulator and a power supply system thereof.
2. Description of the Related Art
In all of the electronic devices, a power supply is a major and necessary component. In general, when a variety of electronic components are combined in an electronic device, the power supply system of the electronic device is required to provide a variety of powers with different waveforms, and thus a conventional device, a primary and a secondary power supply system are used. FIG. 1 is a schematic drawing illustrating a conventional power supply system. In general, a conventional primary and secondary power supply system 100 are composed of a power system central controller 102 and a plurality of remoter controlled PWM power regulators 104 for outputting voltages Vout1 to VoutN. Each of the PWM power regulators 104 is connected to the power supply central controller 102 via a corresponding control signal wire 106. The power supply system can be, for example, applied to the computers. Basically, the power is applied to different loads, such as a CPU, a memory, or a display interface, through the power system central controller 102 and a plurality of remote controlled PWM power regulators 104. In general, different loads have different requirements regarding power, voltage, current or switch timing. Therefore, each remote controlled PWM power regulator is designed with different specification respectively.
Generally, the control signal wire 106 is composed of at least four signal wires for transmitting four signals: a reference voltage Vref, an enable signal En, a Power OK signal, and a fault signal. FIG. 2 is a circuit block diagram showing a prior art remote controlled PWM power regulator of a power supply system. The remote controlled PWM power regulator 104 comprises an error amplifier (EA) 202, an output soft-starting clamp circuit 204, a PWM output stage 206, an LC filter 208, a power ready detecting circuit 210 and a fault detection circuit 212.
Referring to FIG. 2, the error amplifier 202 receives and compares the reference voltage Vref and the output voltage Vout for outputting an error signal. The output soft-starting clamp circuit 204 is provided for clamping the rise of the output voltage of the error amplifier 202 when the power regulator 104 is triggered to avoid the over current of the output capacitor. The PWM output stage 206 is controlled by the enable signal En. After receiving the error signal, the PWM output stage 206 adjusts a duty cycle of the output waveform for generating an average voltage substantially similar to the reference voltage Vref. The LC filer 208 is provided for filtering the average output voltage of the PWM output stage 206. The power ready circuit 210 is provided for informing the power supply central controller 102 that the output voltage Vout has reached a target voltage via the Power OK signal since the output voltage Vout cannot immediately reach the target voltage due to the operation of the clamp circuit 204. The fault detection circuit 212 is provided for detecting fault conditions, such as over current, over voltage, or over temperature, within the power supply regulator 104.
Accordingly, the four signal wires of FIG. 2 have the following functions. First, the voltage reference signal wire transmits the reference voltage Vref from the power supply central controller 102 to the error amplifier 202, and the reference voltage Vref is provided as a target value of the output voltage Vout of the power supply regulator 104. Secondly, the enable signal wire transmits the enable signal En from the power supply central controller 102 to turn on or off the clamp circuit 204 and the PWM output stage 206. Thirdly, the Power OK signal wire informs the power supply central controller 102 that the output voltage has reached the target value via the Power OK signal from the PWM power regulator 104. Fourthly, the fault signal wire informs the power supply central controller 102 that a fault, such as over current, over voltage, or over temperature has been detected within the power supply regulator 104 via the fault condition signal Fault from the power regulator 104.
FIG. 3 is a waveform diagram illustrating the signals transmitted between the central controller and the remote PWM power regulator of a conventional power supply system. Referring to FIG. 3, when the reference voltage Vref is raised from the ground voltage Vss to the target voltage Vcc, the enable signal En is triggered to turn on the clamp circuit 204 and the PWM output stage 206. After the filtering of the LC filter 208, the output voltage Vout is generated. The slope of the output voltage Vout is controlled by the clamp circuit 204 and is irrelevant to the waveform of the reference voltage Vref. When the output voltage Vout reaches, for example, about 90% of the target voltage Vcc, the Power OK signal is triggered and the power supply central controller 102 is informed that the output voltage Vout has reached the target voltage Vcc. When a fault condition is detected within the PWM power regulator 104, the fault signal Fault is triggered and the power supply central controller 102 is informed of the fault condition.
Accordingly, in the power supply system 100 of the prior art, the number of the control signal wires increases with the number of the remote controlled PWM power supply regulator 104, and each control signal wire 106 has four signal wires. In recent years, since the minimization of size and design of the electronic devices is highly desirable, and therefore simplification of the design and reduction in the number of signal wires of the power system is accordingly highly desirable.